********************************************************************************
CALL FOR PAPERS

4th Workshop on
Statistical and Machine learning approaches
to ARchitecture and compilaTion
(SMART'10)

*** 2-WEEK DEADLINE EXTENSION UNTIL November 22, 2009 ***

http://ctuning.org/workshop-smart10

January 24, 2010, Pisa, Italy

Keynote speaker: Prof. Keith Cooper
Rice University, USA

(co-located with HiPEAC 2010 Conference)
********************************************************************************

The rapid rate of architectural change and the large diversity of
architecture features has made it increasingly difficult for compiler
writers to keep pace with microprocessor evolution. This problem has been
compounded by the introduction of multicores. Thus, compiler writers have an
intractably complex problem to solve. A similar situation arises in
processor design where new approaches are needed to help computer architects
make the best use of new underlying technologies and to design systems well
adapted to future application domains.

Recent studies have shown the great potential of statistical machine
learning and search strategies for compilation and machine design. The
purpose of this workshop is to help consolidate and advance the state of the
art in this emerging area of research. The workshop is a forum for the
presentation of recent developments in compiler techniques and machine
design methodologies based on space exploration and statistical machine
learning approaches with the objective of improving performance,
parallelism, scalability, and adaptability.

Topics of interest include (but are not limited to):

Machine Learning, Statistical Approaches, or Search applied to

* Empirical Automatic Performance Tuning
* Iterative Feedback-Directed Compilation
* Self-tuning Programs, Libraries and Language Extensions
* Dynamic Optimization/Split Compilation/Adaptive Execution
* Adaptive Parallelization
* Low-power Optimizations
* Adaptive Virtualization
* Performance Modeling
* Performance Portability
* Adaptive Processor and System Architecture
* Architecture Simulation and Design Space Exploration
* Collective Optimization
* Self-tuning Computing Systems
* Other Topics relevant to Intelligent and Adaptive Compilers/Architectures/OS

**** Paper Submission Guidelines ****

Submitted papers should be original and not published or submitted for
publication elsewhere. Papers should use the LNCS format and should be 15
pages maximum. Manuscript preparation guidelines can be found at the LNCS
website (http://www.springer.com/computer/lncs, go to "For Authors" and then
"Information for LNCS Authors"). Papers must be submitted in the PDF using
the workshop submission website.

An informal collection of the papers to be presented will be distributed at
the workshop. All accepted papers will appear on the workshop website.

**** Important Dates ****

Deadline for submission: November 22, 2009 (2-week extension)
Decision notification: December 14, 2009
Workshop: January 24, 2010 (half-day)

Program Chair:
David Whalley, Florida State University, USA

Organizers:
Grigori Fursin, INRIA, France
John Cavazos, University of Delaware, USA

Steering Committee:
Francois Bodin, CAPS Entreprise, France
John Cavazos, University of Delaware, USA
Lieven Eeckhout, Ghent University, Belgium
Grigori Fursin, INRIA, France
Michael O'Boyle, University of Edinburgh, UK
David Padua, UIUC, USA
Olivier Temam, INRIA, France
Richard Vuduc, Georgia Tech, USA

Program Committee:
Denis Barthou, University of Versailles, France
Chun Chen, University of Utah, USA
Bruce Childers, University of Pittsburgh, USA
Rudolf Eigenmann, Purdue University, USA
Bjorn Franke, University of Edinburgh, UK
Maria Garzaran, UIUC, USA
Sabine Glesner, TU Berlin, Germany
Engin Ipek, Microsoft Research, USA
Prasad Kulkarni, University of Kansas, USA
Xiaoming Li, University of Delaware, USA
Peter Marwedel, TU Dortmund, Germany
Bilha Mendelson, IBM Haifa, Israel
Kathryn McKinley, University of Texas, USA
Boyana Norris, Argonne National Laboratory, USA
Yunheung Paek, Seoul National University, Korea
Markus Puschel, Carnegie Mellon University, USA
Apan Qasem, Texas State University, USA
Martin Schulz, LLNL, USA
Xipeng Shen, College of William & Mary, USA
Linda Torczon, Rice University, USA
R. Clint Whaley, UTSA, USA
Chengyong Wu, ICT, China
Qing Yi, UTSA, USA

Previous workshops:
SMART'07: http://www.hipeac.net/smart-workshop-07.html
SMART'08: http://www.hipeac.net/smart-workshop-08.html
SMART'09: http://www.hipeac.net/smart-workshop.html