The IEEE/ACMInternational Symposium on Microarchitecture® (MICRO)is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and the design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in microarchitecture, compilers, and systems to foster technical exchange and advance the state of the art.

The MICRO community has long benefited from close interaction between academic researchers and industrial designers. We aim to continue and strengthen this tradition at the 59th International Symposium on Microarchitecture (MICRO 2026), which will be held in Athens, Greece.

New for MICRO 2026: In addition to the main research track, MICRO 2026 will feature its inaugural Industry Track, designed to highlight deep technical insights from real-world, production-focused architectural work. The Industry Track has a dedicated call for papers and a tailored review process to better accommodate industry-specific contributions.

Important Dates
Abstract Deadline: March 31, 2026 at 11:59 PM EDT
Full Paper Deadline: April 7, 2026 at 11:59 PM EDT
Rebuttal/Revision: June 3-17, 2026
Author Notification: July 7, 2026

We invite original research paper submissions related to (but not limited to) the following topics:
Microarchitectural, architectural, compiler, and hybrid techniques for improving
performance, power, and energy efficiency
security, privacy, and reliability
cost, complexity, and scalability
programmer productivity, predictability, quality of service, and sustainability
Processor, memory, and storage architectures
Multicore and multiprocessor systems
Instruction-, thread-, and data-level parallelism
Prediction and Speculation mmchanisms
Memory Hierarchy design
Cloud and datacenter-scale computing
IoT, mobile, and embedded architectures
Interconnection networks, routers, and network interface architectures
Accelerator-based, application-specific, and reconfigurable architectures
Architectural support for programming languages, compilation, software development, virtualization, security, and privacy
Architectures for emerging technologies and applications
Architectural support for non-volatile/persistent memory
Quantum computing
In-/near-memory or in-/near-storage processing
Effects of circuits and technology on architecture
Architecture modeling, simulation and benchmarking methodologies
Evaluation and measurement of real computing systems
Submission and Review Process
Submissions must follow the formatting and submission guidelines specified on the conference website. Papers that violate these guidelines may be returned to the authors without review. All submissions will undergo a rigorous double-blind peer-review process. Accepted papers will be presented at the conference.

The Program Chair(s) are responsible for the paper selection process and do not submit papers to avoid potential bias. Program Committee members and the Organizing Committee, including the General Chair(s), are allowed to submit papers because of double-blind reviewing and conflict-of-interest declaration and enforcement. The rationale for explicitly allowing General Chair(s) to submit is that they do not participate in the paper selection process, nor are they involved in the Program Chair and Program Committee selection process. See here for the updated bylaws approved by the MICRO Steering Committee.