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MemSys 2019 : The International Symposium on Memory Systems


When Sep 30, 2019 - Oct 3, 2019
Where Washington DC
Submission Deadline Jun 7, 2019
Notification Due Jul 31, 2019
Final Version Due Aug 15, 2019
Categories    performance evaluation   memory system   modeling   performance evaluation

Call For Papers

The International Symposium on Memory Systems • Sept. 30 – Oct 3, Washington DC

Important Dates
Submission: 31 May, 2019 (+7 days)*
Notification: 31 July, 2019
Camera-Ready: 15 August, 2019
* Automatic 1-week submission extension

Submission Formats
1–2 page Abstracts
5–6 page Position Papers
10+ page Research Papers

Conference paper format, ACM ‘sigconf’
proceedings template, blind submission
(no authors listed), up to 16 pages long

Keynotes & Panelists
Shekhar Borkar, Qualcomm
Steve Pawlowski, Micron
James Ang, PNNL
Jonathan Beard, Arm
Keren Bergman, Columbia
Maya Gokhale, LLNL
Michael Heroux, Sandia National Labs
Hemant Rotithor, Arm
Kenneth Wright, Rambus

This Year Marks our 5th Year!

Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Visit for more information.

Areas of Interest

Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers focusing on system, software, and architecture level concepts, outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following:

Memory-system design from both hardware and software perspectives
Memory failure modes and mitigation strategies
Memory and system security issues
Memory for embedded and autonomous systems (e.g., automotive)
Operating system design for hybrid/nonvolatile memories
Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
Memory-centric programming models, languages, optimization
Compute-in-memory and compute-near-memory technologies
Data-movement issues and mitigation techniques
Interconnects to support large-scale data movement
Algorithmic & software memory-management techniques
Emerging memory technologies, their controllers, and novel uses
Interference at the memory level across datacenter applications
Issues in the design and operation of large-memory machines
In-memory databases and NoSQL stores
Post-CMOS scaling efforts and memory technologies to support them, including cryogenic, neural, and heterogeneous memories

To reiterate, papers that focus on topics outside of traditional conference scopes will be preferred over others.

Submissions and Presentations

Our primary goal is to showcase interesting ideas that will spark conversation between disparate groups—to get applications people, operating systems people, system architecture people, interconnect people and circuits people to talk to each other. We accept extended abstracts, position papers, and/or full research papers, and each accepted submission is given a 20-minute presentation time slot. All accepted papers will be published in the ACM Digital Library and IEEE Xplore.

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