IMPORTANT DATES:
Submission deadline: April 30, 2016.
First decision to authors: June 30, 2016.
Revision due: August 31, 2016.
Acceptance notification: November 15, 2016.
Publication material due: December 10, 2016.
Special Section publication: June 2017.

IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing seek original manuscripts for a Special Section on reconfigurable computing fabrics tentatively scheduled to appear in the June 2017 issues. IEEE Transactions on Emerging Topics in Computing (TETC) seeks original manuscripts for the special issue on Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures. This joint Special Section with IEEE Transactions on Computers will focus on the enabling roles of beyond-CMOS technologies at the circuit- and/or logic-level towards advancement of performance objectives, technology and function heterogeneity benefits, and advanced resilience properties in which reconfigurable fabrics are embarking. Device characteristics of non-volatility, new static vs. dynamic energy consumption profiles, and increased density are enabling advances ranging from soft-error immunity, clocking/signal propagation and interconnect mechanisms, and storage blocks within reconfigurable fabrics that in turn innovate architectural advances. Manuscripts focusing on one or more design-cycle phases including modeling, simulation, design, fabrication/testing, and applications spanning these innovations are sought.

CALL FOR PAPERS
IEEE Transactions on Computers & Transactions on Emerging Topics in Computing
Joint Special Section on Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures

IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing seek original manuscripts for a Special Section on reconfigurable computing fabrics tentatively scheduled to appear in the June 2017 issues. The topics of interest for this special section include:
1. Beyond-CMOS technologies: Circuit- and/or logic-level schemes leveraging new devices (such as memristors, MTJ, NML, PCM, PMC, STT, SiNWFET, CNTs) and related modalities for efficient programmable logic design.
2. Performance-specific fabrics: New designs and techniques for modular architectures and fabrics achieving low-power, high throughput, or improved design complexity tradeoffs.
3. Logic Heterogeneity: Use of novel technology specific logic elements for enhanced logic functionality, tiles, cells, arrays and fabric embedded processor hardcores.
4. Resilience: Fault-tolerance and recovery in reprogrammable fabrics, including use of non-volatile devices for soft error mitigation, approaches embracing autonomy, etc.
5. Clocking/signal propagation: Interconnect for next-generation reconfigurable logic fabrics, including clockless handshaking strategies, GALS approaches, and innovative designs of switching blocks.
6. Storage blocks in reconfigurable fabrics: Advanced techniques and designs for
increased density, including persistence aware storage retention, flexible logic
blocks, and in-fabric memory hierarchies.
7. Fabrication and testing: Fabrication and testing advances for programmable
components and systems for ease of integration and scaling, including 2.5-D and
3-D architectures; manufacturing test for multiple defect detection and correction.
8. Applications: Case studies of an experimental nature that assess innovative
directions in which reconfigurable fabrics are embarking, including dynamic partial
reconfiguration, cross-layer co-design, and intrinsically adaptable architectures, etc.

The submitted papers must describe original research which is not published nor currently under review by other journals or conferences. Extended conference papers should contain at least 50% substantially-new technical material and will pass through the normal review process. Authors are invited to submit manuscripts focused on the odd labeled topics directly to Transactions on Emerging Topics in Computing (TETC) at https://mc.manuscriptcentral.com/tetc-cs and papers focused on the even labeled topics directly to Transactions on Computers (TC) at https://mc.manuscriptcentral.com/tc-cs. Authors should be aware that papers can be published in TC or TETC depending on the availability of space with the final allocation at the discretion of the Editor-in-Chief of the respective Transactions.
Please address all correspondence regarding this Special Section to the Guest Editors (email: ReconfigSI@ucf.edu).
To increase the impact and visibility of their work, interested authors of
accepted papers will be invited to prepare a brief video of their manuscript to be published as supplemental material on the TC or TETC website.
IMPORTANT DATES:
 Submission deadline: April 30, 2016.
 First decision to authors: June 30, 2016.
 Revision due: August 31, 2016.
 Acceptance notification: November 15, 2016.
 Publication material due: December 10, 2016.
 Special Section publication: June 2017.
GUEST EDITORS:
 Ronald F. DeMara
(University of Central Florida)
 Marco Platzner
(University of Paderborn)
 Marco Ottavi
(University of Rome Tor Vergata)