The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of recent advances in all aspects of low power design and technologies, ranging from process and circuit technologies, simulation and synthesis tools, to system level design and optimization. Specific topics include, but are not limited to, the following two main areas, each with three sub-areas:


1. Architecture, Circuits, and Technology

1.1. Technologies and Digital Circuits
Emerging logic/memory technologies and applications; Low power device and interconnect design; Low power low leakage circuits; Memory circuits; Noise reduction; 3-D technologies; Cooling technologies; Battery technologies; Variation-tolerant design; Temperature-aware and reliable design

1.2. Logic and Microarchitecture Design
Processor core design; Cache and register file design; Logic and RTL design; Arithmetic and signal processing circuits; Encryption technologies; Asynchronous design

1.3. Analog, MEMS, Mixed Signal and Imaging Electronics RF circuits; Wireless; MEMS circuits; AD/DA Converters; I/O circuits; Mixed signal circuits; Imaging circuits; Analog noise; Circuits to support emerging technologies; DC-DC converters


2. Design Tools, System and Software Design

2.1. Design Tools
Energy simulation and estimation tools that operate at the circuit/gate level, RT level, behavioral level, and algorithmic level; Variation-aware design; Physical design and interconnects

2.2. System Design and Methodologies
Microprocessor, DSP and embedded systems design; FPGA and ASIC designs; System-level power- and thermal-aware design; System-level reliability- and variability-aware design

2.3. Software Design and Optimization
Power- and thermal-aware software design, scheduling, and management; Application-level optimizations; Wireless and sensor networks; Emerging applications


Submissions on new topics: emerging technologies, architectures/platforms, and applications are particularly encouraged.


TECHNICAL PAPER SUBMISSIONS DEADLINE: Full papers should be received by March 2, 2009. (no extension)

Submissions should be full-length papers of up to 6 pages (double-column format, font size 9pt to 10pt), including all illustrations, tables, references and an abstract of no more than 100 words. Papers exceeding the six-page limit will not be reviewed. Electronic submission in pdf format only via the web is required. More information on electronic submission to ISLPED’09 can be found at http://www.islped.org.

Submitted papers must describe original work that will not be announced or published prior to the Symposium and that is not being considered or under review by another conference at the same time. Accepted papers will be presented in one of two parallel
tracks: one focusing on architectures, circuits and technologies, the other on design tools and systems and software design for low power. Notification of paper acceptance will be mailed by April 27, 2009 and the camera-ready version of the paper will be due by May 18, 2009. Accepted papers will be published in the Symposium Proceedings and included in the ACM Digital Library. Authors of a few selected papers from the Symposium will also be given an opportunity to submit enhanced versions of their papers for publication in a special issue of a reputed journal. ISLPED’09 will present two Best Paper Awards based on the ratings of reviewers
and an invited panel of judges.

INVITED TALK, PANEL, AND TUTORIAL PROPOSALS DEADLINE: RECEIVED by April 6, 2009.

There will be several invited talks by industry and academic leaders on key issues in low power electronics and design. All invited
talks will be in plenary sessions. The Symposium also may include embedded tutorials to provide attendees with the necessary
background to follow recent research results, as well as panel discussions on future directions and design/technology alternatives in
low power electronics and design. Proposals for invited talks, embedded tutorials, and the panel should be sent to:

Naehyuck Chang, Seoul National University, naehycuk@snu.ac.kr
Tahir Ghani, Intel, tahir.ghani@intel.com