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Robust and Energy-Secure Systems 2014 : IEEE JETCAS Special Issue on Robust and Energy-Secure Systems | |||||||||||||
Link: http://jetcas.polito.it/call_paper.html | |||||||||||||
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Call For Papers | |||||||||||||
Corresponding Guest Editor: Augusto Vega (IBM Research)
Other Guest Editors: Simha Sethumadhavan (Columbia University) Subhasish Mitra (Stanford University) Submissions due: Jan 31, 2014 Publication date: June 2014 Website: http://jetcas.polito.it/call_paper.html The "power wall" has forced chip designers and system architects to integrate novel power and thermal management control loops into systems to enable smaller margins between nominal and worst-case operating points. These management protocols create new challenges for chip and system designers. Examples include control loop stability, robustness of the management protocols, potential security vulnerabilities in integrated control loops and management firmware, and system security and safety challenges triggered by violations of energy, reliability, power or thermal limits. We have coined the term "robust and energy-secure systems" to cover the broad range of research being pursued within industry and academia to ensure reliable and secure operation of systems with integrated power, reliability, and thermal management control loops. Through this JETCAS special issue, we seek novel research papers on holistic approaches to designing emerging on-chip control systems. We solicit papers in the areas of energy/power/thermal management, reliability, and security to provide a comprehensive view of the hardware and software aspects of Robust and Energy-Secure Systems. Areas of interest include, but are not limited to: o Holistic cross-layer energy, power, thermal and reliability management solutions o Robustness of system energy/power/thermal/reliability management: verification, validation and design for verification o Reliability and security holes exposed by energy/power/thermal management protocols o Guarded, two-level management protocols for safety, security and low verification complexity o Architectural implications of and system software support for robust energy/power/thermal management o Reliability and security issues in emerging low-power memory technologies o Power- and thermal-based side-channel attacks Prospective authors should submit PDF versions of their papers following the instructions provided on the JETCAS web-site: http://jetcas.polito.it/general.html. Submitted manuscripts should not have been previously published nor should they be currently under consideration for publication elsewhere. Manuscripts will undergo a peer review process according to the standard IEEE publication policy. ================ Important Dates ================ o Paper submission: January 31, 2014 o First round of reviews completed: February 21, 2014 o Revised manuscripts due: March 4, 2014 o Notification of acceptance: March 25, 2014 o Final manuscripts due date: April 1, 2014 ===================== Supporting Committee ===================== o Dimitris Gizopoulos, University of Athens (Greece) o Ramon Canal, UPC Barcelona (Spain) o Hiroshi Nakamura, University of Tokyo (Japan) o Pradip Bose, IBM Research (United States) o Alper Buyuktosunoglu, IBM Research (United States) o Hiroshi Sasaki, Kyushu University (Japan) =========== Questions? =========== Contact Guest Editor: Augusto Vega (ajvega@us.ibm.com) |
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