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FPL 2014 : 24th International Conference on Field Programmable Logic and Applications


Conference Series : Field-Programmable Logic and Applications
When Sep 2, 2014 - Sep 4, 2014
Where Munich, Germany
Submission Deadline Mar 28, 2014
Notification Due Jun 6, 2014
Final Version Due Jun 27, 2014
Categories    reconfigurable computing   FPGA

Call For Papers

The International Conference on Field Programmable Logic and Applications (FPL) is the first and largest conference covering the rapidly growing area of field-programmable logic. During the past 23 years, many of the advances achieved in reconfigurable system architectures, applications, embedded processors, design automation methods (EDA) and tools have been first published in the proceedings of the FPL conference series. Its objective is to bring together researchers and practitioners from both academia and industry from all over the world.

The 24th FPL conference will be hosted by the Technical University of Munich, Germany, on September 2 - 4, 2014. Tutorials and associated workshops are offered on September 1 and 5. The Program Committee cordially invites you to participate and submit your contributions to FPL 2014. FPL 2014 plans to gear a technical focus towards: “Dependable, power efficient FPGA accelerators and heterogeneous computing platforms for HPC and embedded / cyber physical systems”.

Submissions on the listed topics within the following four conference tracks are welcome:
Architectures and Technology

• Advanced interconnect technologies, adaptive NoCs
• Low power architectures
• Heterogeneous computing: Multicores, FPGAs, GPUs, DSPs
• Fault tolerant architectures
• Self-organizing architectures and techniques
• 2.5D and 3D architectures
• Analog and Mixed-signal arrays
• Emerging device technologies
Applications and Benchmarks

• Aerospace, Automotive and Industry automation
• Bioinformatics & medical systems
• Communications, Software Defined Networking and Internet-of-Things
• Finance, HPC and database acceleration
• Reconfigurable embedded & cyber physical system
• Signal processing and SDR
• Benchmarks for FPGA designs
Design Methods and Tools

• Rapid prototyping and emulation
• System-level design tools
• High-level synthesis
• Hardware / software co-design
• Logic optimization and technology mapping
• Partial run-time reconfiguration
• Placement and routing
• Testing and verification
Surveys, Trends and Education

• Deployment of FPGAs in new application domains
• History/surveys of reconfigurable logic
• Roadmap of reconfigurable computing platforms
• Teaching courses and tutorials

We highly encourage authors to make their research results – including systems, benchmarks, or tools – freely available in order to gain research and design productivity within the FPL community. We further invite authors to present working demo systems or tools in conjunction with the PhD-Forum.

Authors are invited to submit original and unpublished contributions as 6 page papers in IEEE double column format to be considered as regular papers. Submissions accepted as posters will have 4 pages and extended abstracts for PhD forum contributions appear with 2 pages in the proceedings. The conference proceedings will be published at IEEE Xplore (to be confirmed). Authors of selected papers will be invited to submit extended versions to a special issue in ACM TRETS. All contributions must be submitted electronically in PDF format on the web page, where all logistics around paper submission will be described in detail.

FPL’s PhD forum is intended as a venue for PhD students to present their work in progress and preliminary results in a special poster session to receive feedback from other researchers.

Proposals for tutorials, pre-, and post conference workshops within the technical scope of FPL are solicited and should be mailed with a corresponding subject description to the program / workshop & tutorial co-chairs using the mail address

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