posted by user: andrewjm33 || 2032 views || tracked by 3 users: [display]

IET CDT Nano SI 2008 : IET Computers & Digital Techniques Special Issue on Advances in Nanoelectronics Circuits and Systems


When N/A
Where N/A
Submission Deadline Oct 6, 2008
Categories    computers digital techniques   nanoelectronics   circuits   systems

Call For Papers

IET Computers and Digital Techniques is seeking original and unpublished papers for a special issue titled "Advances in Nanoelectronics Circuits and Systems" to be published in early 2009. Alternative nanoarchitectures, design-space exploration, and fault tolerance have emerged as major challenges for nanoscale technologies. Extremely high defect rates are being predicted for nanoscale fabrication processes, both for top-down mask-based manufacturing and bottom-up self-assembly. Consequently, there is a need for innovative design solutions, architectures, and test methods. Recent years have seen significant growth in research on these topics, and a number of different research irections are currently being explored. This trend will continue in the near future and even more innovative solutions for improving yield, density, and reliability are expected to emerge.

The aim of this special issue is to bring together researchers to share recent results on various aspects of nanoarchitectures and nanoscale circuit/system design, with coverage ranging from architectural perspectives on nanotechnologies, circuit and system modeling, fault-tolerant design, to design for testability. The special issue will foster further research, thereby leading to the emergence of creative ideas and practical solutions. Some specific topics of interest, but not limited to, are:

- Alternative architectures and circuit/system design for nanoscale technologies
- Fault-tolerant design and nanoarchitectures for existing and emerging technologies.
- Design techniques to enhance yield and reliability.
- Modeling techniques for different nanotechnology devices and systems
- Case studies.
- Fault models, testing, and design for testability

Important dates:
Manuscript submission: October 6, 2008
Completion of first round of reviews: January 15, 2009
Submission of revised manuscripts: March 1, 2009
Notification of Acceptance: April 15, 2009
Special Issue publication: June, 2009

Guest Editors:
Bipul C. Paul
Toshiba America Research

Krishnendu Chakrabarty
Duke University, USA

To submit a paper please go to
and follow link to "submit"

Related Resources

WBDE--JA, Scopus, EI (INSPEC, IET) 2020   2020 Workshop on Big Data Engineering (WBDE 2020)--JA, Scopus, EI (INSPEC, IET)
SoCC 2020   Symposium on Cloud Computing
IET Smart Cities 2020   IET Smart Cities: Geospatial Sensing, Mining & Analytics for Smart Cities
ICoIV 2020   2020 International Conference on Intelligent Vehicles (ICoIV 2020)
CSTE--JA, Scopus 2020   2020 The 2nd International Conference on Computer Science and Technologies in Education (CSTE 2020)--JA, Scopus & EI (INSPEC, IET)
ICACS--ACM, Ei and Scopus 2020   ACM--2020 4th International Conference on Algorithms, Computing and Systems (ICACS 2020)--Ei Compendex, Scopus
ICPR-IETBiom-VSaaS 2021   25th ICPR 2020 Special Issue on Real-Time Visual Surveillance as-a-Service (VSaaS) for Smart Security Solutions in IET Biometrics
JEDT 2020   International Journal of Electronic Design and Test
IET Smart Retail 2020   IET Smart Cities: Special Issues on Smart Retail & E-Commerce
EI-2IM 2020   2020 International Conference on Intelligent Manufacturing and Intelligent Materials(2IM 2020)