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IDT 2013 : IEEE Design and Test Symposium

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Link: http://idtsymposium.org/
 
When Dec 16, 2013 - Dec 18, 2013
Where Marrakesh, Morocco
Abstract Registration Due Aug 4, 2013
Submission Deadline Aug 11, 2013
Notification Due Sep 15, 2013
Final Version Due Nov 15, 2013
Categories    design methods and tools   test and reliability
 

Call For Papers

Call for Papers

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The International Design and Test Symposium explores emerging challenges and novel concepts in design, automation, test and reliability of electronic products ranging from integrated circuits through multi-chip modules and printed circuit boards to full systems and microsystems. IDT provides unique forum to discuss best practices and novel ideas in design methods, tools, test and reliability in the Middle East and Africa (MEA) region. IDT’13 will take place in Marrakesh, Morocco. The Symposium is initiated by and in affiliation with the IEEE Test Technology Technical Council (TTTC) and the 2013 edition is organized by The Delft University of Technology and technically sponsored by IEEE CEDA (Council on Electronic Design Automation). The official language of the conference is English.



Manuscripts describing original work on any topic from the scope of IDT are welcome. Authors are asked to submit technical papers in accordance to the author’s instructions in one of the following two conference tracks, and topics of interest include but are not limited to:





Design Methods and Tools

SOC, SIP, NOC design

Multiprocessor systems

Embedded systems

Analog, Mixed Signal and RF systems

MEMS and MOEMS systems

Low Voltage and Low Power syst.

Innovative technologies

Real time systems

Simulation, Validation & Verification

System Specification and Modelling

Formal Methods and Verification

System Design/Synthesis/Optimization



Test and Reliability

SOC and SIP testing

Multiprocessor test

Memory & FPGA Test & repair

Delay testing

Analog and Mixed Signal testing

MEMS/MOEMS testing

Defect and fault modeling

DFT, BIST and BISR

On-line testing / fault tolerant syst.

Fault Simulation, ATPG

Reliability failures/ modeling

Circuit reliability

Electronic system reliability

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