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WRC 2013 : 7th HiPEAC Workshop on Reconfigurable Computing

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Link: http://www.cad.polito.it/research/!_EVENTS/WRC_2013/
 
When Jan 21, 2013 - Jan 23, 2013
Where Berlin, Germany
Submission Deadline Nov 26, 2012
Notification Due Dec 30, 2012
Final Version Due Jan 11, 2013
Categories    computing   reconfigurability   fault tolerance   design performance and optimiz
 

Call For Papers

Workshop on Reconfigurable Computing - WRC 2013 -- CALL FOR PAPERS
Berlin, January 21-23, 2013
http://www.cad.polito.it/research/!_EVENTS/WRC_2013

===========================
CALL FOR PAPERS
===========================

The main purpose of this workshop is to encourage the submission of work-in-progress in the topics covered by the call, thus providing quick and valuable feedback. As such we do not provide formal proceedings. We encourage authors of papers who want to immediately timestamp their idea to forward their paper to HiPEAC tech-report, after presentation at our workshop. Moreover, best papers will be selected and forwarded for possible publication in an international ISI IEEE/ACM Transactions journal.

JOURNAL SPECIAL ISSUE
===========================
Best papers will be selected and forwarded for possible publication on an
IEEE/ACM Transactions. Details will be provided soon.

TOPICS
===========================
The Hot Topic for the 7th edition of WRC is SPACE AND AVIONICS RECONFIGURABLE APPLICATIONS:

-Radiation tolerant FPGA architecture
-Single Event Effects aware Configurable Logic Blocks
-Single Event Upsets mitigation solutions for FPGA
-Dynamic reconfigurable computing for space
-Remote FPGA configuration for space applications
-Fault tolerant reconfigurable systems
-Self-based reconfiguration FPGA for space
-Design tools for SRAM and non-volatile FPGA for space and avionics

The topics of interest include, but are not limited to:

Reconfigurable Architectures:

- Novel architectures (logic blocks, interconnects, I/O)
- Reconfigurable fabrics combined with dedicated system blocks (DSP, processors, memory etc.)
- Memory issues: adaptivity, coherence, latency tolerance,
- Multicore support, resource sharing support,
- Low power reconfigurable architectures,
- Networks on chip tailored for reconfigurable architectures,
- Dynamic and run-time reconfiguration,
- Defect and Fault Tolerance

Reconfigurable Tools and Technologies:

- System level design and HW/SW co-design
- Static and dynamic power efficiency
- Modeling, optimization, technology mapping and design verification
- Design and debug of reconfigurable systems
- Testing, verification and benchmarking
- Dedicated compilers and high-level languages
- Operating system support for reconfigurability
- Impact of reconfigurable hardware on real-time performance

Reconfigurable Applications and Algorithms:

- Adaptive and bio inspired applications
- Domain-specific applications, e.g. multimedia, bioinformatics, cryptography and more
- High-performance, high reliability and/or power efficient application acceleration
- Rapid prototyping

SUBMISSIONS
===========================
For Paper Submission, please visit:
http://www.cad.polito.it/research/!_EVENTS/WRC_2013

IMPORTANT DATES
===========================
Submission deadline: November 26, 2012
Notification of acceptance: December 30, 2012
Final version due: January 11, 2013
===========================

FURTHER INFORMATION
===========================
Luca Sterpone, General Co-Chair
Politecnico di Torino, Torino, IT
e-mail: luca.sterpone@polito.it

Dionisios N. Pnevmatikatos, General Co-Chair
TUC, Chaina, GR
e-mail: pnevmati@ece.tuc.gr

Mario Porrmann, Program Co-Chair
University of Bielefeld, DE
e-mail: mporrman@cit-ec.uni-bielefeld.de

Yannis Papaefstathiou, Program Co-Chair
Technical University of Crete, GR
e-mail: ygp@ece.tuc.gr

===========================
PROGRAM COMMITTEE
===========================

Sandro Bartolini, University of Siena, Italy
Christophe Bobda, University of Arkansas, USA
Cristiana Bolchini, Politecnico di Milano, Italy
Luigi Carro, UFRGS, Brazil
Daniel Chillet, Université Rennes, France
Martin Danek, Institute of Information Theory and Automation, Czech Republic
Eduardo De La Torre, Universidad Politecnica de Madrid
Carlo Galuzzi, TU Delft, The Netherlands
Georgi N. Gaydajiev, TU Delft, The Netherlands
Roberto Giorgi, Università di Siena, Italy
Michael Hübner, University of Karlsruhe, Germany
Wolfgang Karl, University of Karlsruhe, Germany
Costas Kyriacou, Frederick University, Cyprus
Stavrou Kyriakos, Intel Labs Barcelona, Spain
Andreas Koch, TU Darmstadt, Germany
Dirk Koch, University of Oslo, Norway
Bilha Mendelson, IBM, Israel
Aleksandar Milenkovic, University of Alabama in Huntsville, AL, USA
Nacho Navarro, UPC, Spain
Gianluca Palermo, Politecnico di Milano, Italy
Dan Poznanovic, Cray Inc., St. Paul, USA
Paolo Rech, UFRGS, Brazil
Theocharis Thecoharidis, University of Cyprus
Marco D. Santambrogio, Politecnico di Milano, Italy
Leonel Sousa, University of Lisbon, Portugal
Dirk Stroobandt, Ghent University, Belgium
Bertil Svensson, Halmstad University, Sweden
Dimitrios Soudris, NTUA, Greece
Ioannis Sourdis, TU Delft, The Netherlands
Pedro Trancoso, University of Cyprus, Cyprus
David Thomas, Imperial College, UK
Theo Ungerer, University of Augsburg, Germany
Tanya Vladimirova, University of Leicester, UK
Stephan Wong, TU Delft, The Netherlands
Jason Xue, City University of Hong Kong, China

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