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DATE 2013 : Design Automation and Test in Europe


Conference Series : Design, Automation, and Test in Europe
When Mar 19, 2013 - Mar 22, 2013
Where Grenoble, France
Abstract Registration Due Sep 9, 2012
Submission Deadline Sep 14, 2012
Notification Due Nov 16, 2012
Final Version Due Dec 16, 2012
Categories    design automation   test   verification   electronics

Call For Papers

The DATE 2013 conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software.

The five-day event consists of a conference with plenary invited papers, regular papers, panels, hot-topic sessions, tutorials and workshops, two special focus days and a track for executives. The scientific conference is complemented by a commercial exhibition showing the state-of-the-art in design and test tools, methodologies, IP and design services, reconfigurable and other hardware platforms, embedded software, and (industrial) design experiences from different application domains, e.g. automotive, wireless, telecom and multimedia applications. The organisation of user group meetings, fringe meetings, a university booth, a PhD forum, vendor presentations and social events offers a wide variety of extra opportunities to meet and exchange information on relevant issues for the design and test community. Special space will also be allocated for EU-funded projects to show their results.
The Conference

The conference addresses all aspects of research into technologies for electronic and (embedded) systems engineering. It covers the design process, test, and tools for design automation of electronic products ranging from integrated circuits to distributed large-scale systems. This includes both hardware and embedded software design issues. The conference scope also includes the elaboration of design requirements and new architectures for challenging application fields such as telecom, wireless communications, multimedia and automotive systems. Persons involved in innovative industrial designs are particularly encouraged to submit papers to foster the feedback from design to research. Panels, hot-topic sessions and embedded tutorials highlight and inform about emerging topics.

Special Days in the programme will focus on two areas bringing new challenges to the system design community:

High-Performance Low-Power Computing
Electronic Technologies for Smart Cities

On the first day of the DATE event, half- and full-day in-depth technical tutorials are given by leading experts in their respective fields. The tutorials are well suited for researchers, tool developers and system designers.

Friday Workshops concentrate on specialised and novel topics.
The Exhibition

The conference is complemented a large exhibition and unique networking opportunity for vendors of tools and services for hardware and embedded software for the design, development and test of Systems-on-Chip, IPs, Embedded Systems, ASICs, FPGAs and PCBs including a broad range of design reuse technologies and services. To inform attendees on commercial and design related topics, there will be a full programme in the Exhibition Theatre which will combine presentations by exhibiting companies and selected conference special sessions.
Topic Areas for Submission

Within the scope of the conference, the main areas of interest are organised in the following tracks. Submissions can be made to any of the track topics. For detailed descriptions of the track topics, please refer to the DATE Web site at

Track D: DESIGN METHODS AND TOOLS, addressing design automation and design tools for electronic and embedded systems. Emphasis is on methods and tools related to the use of computers in designing products. This includes designer feedback on existing design methods and tools as well as to initiate discussions on requirements of future system architectures, design flows and environments.

This track is organised in the following topics:

D1 System Specifications, Models, and Methodologies
D2 System Design, Synthesis and Optimization
D3 Simulation and Validation
D4 Design of Low Power Systems
D5 Power Estimation and Optimization
D6 Emerging Technologies, Systems and Applications
D7 Formal Methods and Verification
D8 Networks-on-Chip
D9 Architectural and Micro-Architectural Design
D10 Architectural and High-Level Synthesis
D11 Reconfigurable Computing
D12 Logic Synthesis and Timing Analysis
D13 Physical Design and Verification
D14 Analog and Mixed-Signal Systems and Circuits
D15 Modeling and Design for Signal and Power Integrity

Track A: APPLICATION DESIGN, is devoted to the presentation and discussion of design experiences with a high degree of industrial relevance, as well as innovative design methodologies and applications of specific design technologies. Contributions should illustrate state-of-the-art or record breaking designs, which will provide viable solutions in tomorrow's silicon and embedded systems. In topic A7, there is the opportunity to submit short, 2-page papers, that relate to industrial research and practice.

This track is organised in the following topics:

A1 Green Computing Systems, Click here for details
A2 Communication, Consumer and Multimedia Systems, Click here for details
A3 Transportation, Management and Energy Generation Systems, Click here for details
A4 Medical and Healthcare Systems, Click here for details
A5 Secure Systems, Click here for details
A6 Reliable and Reconfigurable Systems, Click here for details
A7 Industrial Experiences Brief Papers, Click here for details

Track T: TEST AND RELIABILITY, addressing design-oriented embedded test solutions as well as defect analysis, modeling, test generation and silicon debugging. Emphasis is on both system- and chip-level test.

This track is organised in the following topics:

T1 Test for Defects, Variability, and Reliability, Click here for details
T2 Test Generation, Simulation, and Diagnosis, Click here for details
T3 Test for Mixed-Signal, Analog, RF, MEMS, Click here for details
T4 Test Access, Design-for-Test, Test Compression, System Test, Click here for details
T5 On-Line Testing and Fault Tolerance, Click here for details

Track E: EMBEDDED SYSTEMS SOFTWARE, is devoted to modeling, analysis, design and deployment of Embedded Software. Areas of interest include methods, tools, methodologies and development environments. Emphasis will also be on embedded software platforms, software integration, adaptive real-time systems, and dependable systems.

This track is organised in the following topics:

E1 Real-time, Networked, and Dependable Systems, Click here for details
E2 Compilers and Software Synthesis for Embedded Systems, Click here for details
E3 Model-Based Design and Verification for Embedded Systems, Click here for details
E4 Embedded Software Architectures, Click here for details
E5 Cyber-Physical Systems, Click here for details

In addition to the above conference tracks, we welcome proposals for Special Sessions, Tutorials and Friday Workshops, and submissions for the Special Days on High-Performance Low-Power Computing and Electronic Technologies for Smart Cities.

A full list of the executive and programme committee members is available on the DATE Web site.

Click here for DATE Executive Committee (DEC) members
Click here for DATE Technical Programme Committee (TPC) members


The event is sponsored by the European Design and Automation Association, the EDA Consortium, the IEEE Council on EDA, ECSI, ACM - SIGDA, and RAS. In cooperation with ACM – SIGBED, IEEE Solid-State Circuits Society (SSCS), IFIP, IET, and TTTC.

Conference Manager
Sue Menzies, European Conferences, UK
phone: +44 131 225-2892
fax: +44 131 225-2925

General Chair
Enrico Macii, Politecnico di Torino, IT
Contact Enrico Macii

Programme Chair
Erik Jan Marinissen, IMEC, BE
Contact Erik Jan Marinissen

To add your name to the mailing list, please register at the DATE Web site:
Submission Instructions

Please have a look at the detailed submission instructions at

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