PATMOS 2012 : The International Workshop on Power and Timing Modeling, Optimization and Simulation
Conference Series : Power and Timing Modeling, Optimization and Simulation
Call For Papers
Preliminary Call For Papers
The 22nd International Workshop on Power and Timing Modeling, Optimization & Simulation
Newcastle upon Tyne, United Kingdom
September 4-6, 2012
Paper Submission Deadline: 18th May 2012 (Friday) Special Session Proposal Deadline: 18th May 2012 (Friday) Notification of Acceptance: 2nd July 2012 (Monday) Camera Ready: 20th July 2012 (Friday)
Preliminary Call for Papers
PATMOS 2012 is the 22nd in a series of international workshops on Power And Timing Modeling, Optimization and Simulation. The PATMOS meeting has evolved into a leading scientific event where industry and academia meet to discuss power and timing aspects in modern integrated circuit and system design. PATMOS 2012 will be held on 4th-6th September, 2012 and co-located with CONCUR 2012, an official event of The Alan Turing Year. PATMOS 2012 is organized by Newcastle University, United Kingdom.
Newcastle is a short name of Newcastle upon Tyne, which is about 1000 years old. The city owes its name to the castle built in 1080. The city grew as an important centre for the wool trade and later became a major coal mining area. The port developed in the 16th century and, along with the shipyards lower down the river, was amongst the world's largest shipbuilding and ship-repairing centers. These industries have since experienced severe decline and closure, and the city today is largely a business and cultural centre, with a particular reputation for nightlife. Newcastle University is a major research-intensive university located in Newcastle upon Tyne in the north-east of England. It was established as a School of Medicine and Surgery in 1834 and became the University of Newcastle upon Tyne by an Act of Parliament in August 1963. Newcastle University is a member of the Russell Group, an association of research-intensive UK universities. The University has one of the largest EU research portfolios in the UK. About 5,000 employees work for the university and 20,000 students are registered with the Newcastle University.
The PATMOS objective is to provide a forum to discuss and investigate emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGA’s. The technical program will focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modelling, design, characterization, analysis and optimization. The emphasis of the workshop is on, but not limited to, the following topics:
Reliability and Technology Variations
• Modeling and simulation in the presence of on-chip variability;
• Variation-aware circuit design;
• Reliability issues in nanoscale circuits;
• Soft errors and radiation hardening;
• Fault tolerance and dependability;
• Resilient circuits;
• Design solutions for self adaptive circuits and systems;
• PVTA sensors;
• Redundant designs and applications;
Low Power and Thermal-aware Design
• Design techniques for low power circuits and systems at all levels of abstraction;
• Methods and tools for analysis and characterization of power consumption;
• Power Estimation and Optimization;
• Low power Architectures and System Level Techniques;
• Power and thermal sensors;
• Power-aware architectures: wireless sensor networks, green computing, ultra low-power embedded systems;
• Special power related topics, e.g. low voltage, leakage power, power grid, interconnect power, clock tree power, power aware test pattern generation, power-aware synthesis, compilation and floorplanning;
• Thermal-aware circuit and system design;
• Polices for thermal optimization;
• Hardware-software interaction for temperature minimization;
• Thermal models and temperature estimation;
• Temperature-driven reliability issues;
Timing and Performance
• Methodologies and tools for the analysis, design and verification of timing and performance properties of integrated circuits and systems at all levels of abstraction;
• Variability and statistical timing analysis;
• Design for yield, design for manufacturability;
• Simulation tools;
• Design and issues concerning asynchronous and GALS systems;
• Special timing or performance related topics, e.g. crosstalk, synchronization, side-channel attacks.
Power, Reliability and Timing Issues Addressing Specific Technologies
• Reconfigurable Architectures;
• Caches and Memory Devices;
• Emerging Memory Technologies, e.g. Phase Change Memories.
Design Experience and Case Studies
• Examples, test cases, benchmarks or design studies which present innovative solutions for timing, performance or power consumption related design challenges.
Contributions are invited for regular presentations and discussion sessions. Prospective authors are invited to submit their complete paper, including a 100-word abstract and illustrations, in A4 camera-ready format, not exceeding 10 pages or 5000 words. Electronic submission is required and should follow the style for the final publication. Several reviewers will review submitted papers formally and anonymously. Springer will publish the PATMOS 2012 proceedings in the series “Lecture Notes in Computer Science (LNCS)(http://www.springer.de/comp/lncs/index.html).” LATEX instructions for the required paper format can be located at: Springer Website(http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0).
A selection of the best papers of PATMOS 2012 will be published in a special issue of an international journal. The selection will consider the reviews of the paper and the quality of the presentation at the conference.
Proposals for panel sessions and special sessions are encouraged and must be received no later than end of April 2012.
Please note: contributions not presented will not be published. The proceedings will be produced right after the workshop with no-shows removed. A pre-publication electronic version of the proceedings will be available during the workshop. At least one full registration for each accepted paper will be required.
Delong Shang and Alex Yakovlev, Newcastle University, United Kingdom
Technical Program Chair:
Jose L Ayala, Complutense University, Spain