Call for Papers
Scope:

PACT is a long-running and unique conference at the intersection of classical parallel architectures and compilers that brings together researchers from architecture, compilers, programming languages, and applications to present and discuss their latest research results. Applications as a driver for innovations in architectures and compilers is an important theme of the conference.

We solicit contributions in a broad range of topics, including (but not limited to) the following:

Parallel architectures and computational models
Compilers and tools for parallel computer systems
Multicore, multithreaded, superscalar, and VLIW architectures
Compiler/hardware support for hiding memory latencies
Support for correctness in hardware and software
Reconfigurable parallel computing
Dynamic translation and optimization
I/O issues in parallel computing and their relation to applications
Parallel programming languages, algorithms and applications
Middleware and run time system support for parallel computing
Application-specific parallel systems
Applications and experimental systems studies of parallel processing
Relevant aspects of distributed computing and mobile computing
Heterogeneous systems using various types of accelerators
Insights for the design of parallel architectures and compilers from modern parallel applications (e.g., machine learning, data analytics, and computational biology)
Future parallel systems for beyond Moore’s law and/or beyond Exascale

Information for Authors:

Paper submissions are due . Detailed instructions for electronic submission and other important dates will be posted on the PACT conference web site (http://www.pactconf.org). For additional information regarding paper submissions please contact the Program Chairs.
Artifact Evaluation:

An important foundation of many PACT papers is the software used to support the reported results. To recognize the effort involved in developing high-quality software and to foster a culture of reproducibility, PACT19 will include a separate artifact evaluation process.