The submission deadline of the International Workshop on Hardware Accelerated Data Mining (HADM'15) to be held with IEEE International Conference on Data Mining has been moved to July 27, 2015.

14 November 2015, Atlantic City, New Jersey, USA.
Website: http://www.usc.edu/hadm
Submission page: http://wi-lab.com/cyberchair/2015/icdm15/scripts/submit.php?subarea=S18&undisplay_detail=1&wh=/cyberchair/2015/icdm15/scripts/ws_submit.php

Call for papers:
Data mining is expected to work on increasingly complex workloads (e.g., Petabytes of networked-data under real-time constraints) using emerging hardware accelerators (e.g., commodity and specialized Multi-core, GPUs, FPGAs, and ASICs) and corresponding programming models (e.g., MapReduce, GraphLab, CUDA, OpenCL, and OpenACC). The use of hardware accelerators for mining high-rate data streams is becoming common mainly due to the rapidly increasing amount of data available for real-time analytics. The idea of using special-purpose hardware to accelerate computation has a long tradition in data processing but has thus far not made its way into mainstream data mining. Many essential issues in this area have yet to be explored. For instance, large-scale graph computations are commonplace in many fields. However, this graph data is sparse and highly non-uniform. Graph structure mining algorithms exhibit weak spatial locality when processing graphs with power law distributions and such algorithms are data-intensive and cache-hostile.

The aim of this workshop is to provide a venue for designers, practitioners, researchers, developers, and industrial/governmental partners to come together, present and discuss leading research results, use cases, innovative ideas, challenges, and opportunities that arise from accelerating mining of big data using new hardware, and identify future directions and challenges in this area.

Topics of Interest
• Algorithms, models, and theory of hardware accelerated data mining
• Hardware accelerated data mining systems and platforms
• Scalable algorithms & architectures for Machine learning over structured, semi-structured, spatio-temporal, graph, and streaming data
• Domain-Specific Languages for hardware synthesis of data mining applications
• Novel data mining algorithms optimized for massively parallel architectures
• Hardware acceleration of data mining in applications from different domains, including social science, bioinformatics, and smart grids

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Key dates:
Due date for full workshop papers: July 27, 2015 Notification of workshop papers acceptance to authors: September 1, 2015 Camera-ready deadline for accepted papers: September 10, 2015 Workshop date: November 14, 2015

Papers should be at most 10 pages in the IEEE 2-column format (for IEEE Computer Society conference proceedings).

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Organization Chairs
Charalampos Chelmis, University of Southern California, USA; Anand Panangadan, University of Southern California, USA

Technical Program Committee
Jaume Bacardit, Newcastle University, United Kingdom
Zachary Baker, Los Alamos National Laboratory, USA
Rajesh Bordawekar, Thomas J. Watson Research Center, USA
Sutanay Choudhury, Pacific Northwest National Laboratory, USA
Eric Chung, Microsoft Research, USA
Hadi Esmaeilzadeh, Georgia Institute of Technology, USA
Joo-Young Kim, Microsoft Research, USA
Ioannis Koltsidas, IBM Zurich Research Laboratory, Switzerland
Walid Najjar, University of California, Riverside, USA
Arindam Pal, Innovation Labs Kolkata, TCS Research, India
Ippokratis Pandis, Cloudera, USA
Edward Yi-Hua Yang, Google, Inc., USA
Yinglong Xia, IBM Thomas J. Watson Research Center, USA