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MULTIPROG 2016 : Programmability and Architectures for Heterogeneous Multicores | |||||||||||||
Link: http://research.ac.upc.edu/multiprog/ | |||||||||||||
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Call For Papers | |||||||||||||
Computer manufacturers have embarked on the many-core roadmap, promising to add more and more cores/hardware threads on their chips. The ever-increasing number of cores and heterogeneity in architectures has placed new burdens on the programming community. Software needs to be parallelized and optimized for accelerators such as GPUs in order to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.
The ninth edition of the MULTIPROG workshop aims to bring together researchers interested in programming models, runtimes, and computer architecture. The workshop's emphasis is on heterogeneous architectures and covers issues such as: How can future parallel programming models improve software productivity? How should compilers, runtimes and architectures support programming models and emerging applications? How to design efficient data structures and innovative algorithms? MULTIPROG is intended for quick publication of early results, work-in-progress, etc., and is not intended to prevent later publication of extended papers. Informal proceedings with accepted papers will be made available at the workshop and online at the workshop’s web page http://research.ac.upc.edu/multiprog/. Topics of interest Papers are sought on topics including, but not limited to: Multi-core architectures Architectural support for compilers/programming models Processor (core) architecture and accelerators, in particular GPUs Memory system architecture Performance, power, temperature, and reliability issues Heterogeneous computing Algorithms and data structures for heterogeneous systems Applications for heterogeneous computing and real-time graphics Programming models for multi-core architectures Language extensions Run-time systems Compiler optimizations and techniques Benchmarking of multi-/many-core architectures Tools for discovering and understanding parallelism Tools for understanding performance and debugging Case studies and performance evaluation |
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