Advanced scientific and engineering communities have used parallel computing
to solve their large scale complex problems for a long time. Nowadays,
however, technology is currently going through some important evolutionary
trends. Multi and many-core architectures are becoming common place. These
novel architectures are offering a better combination of processing power and
energy efficiency, but the technology advances have been observed from the
hardware point of view. From the application side, taking full advantage of
the power of multi and many-core architectures is still challenging. This
workshop opens up an opportunity for application designers and computer
architects to discuss emerging applications as well as their implications on
current- and next-generation many-core architectures. Our goal is to confirm
the current status of application development and optimization techniques for
this new technology as well as the future trends, exposing the findings,
requirements, and problems to a select audience of top computer architecture
researchers.

The workshop will accept technical papers (up to 6 pages) written in English,
unpublished and not under review elsewhere. The acceptance of a paper implies
that at least one of its authors will register for the workshop to present it.
All submissions must be in PDF format, and must follow the standard IEEE
formatting guidelines (submission).

Workshop Chairs
Claude Tadonki (MINES ParisTech - PSL)
Cristiana Bentes (State University of Rio de Janeiro)
Guido Araujo (State University of Campinas)
Lucia Drummond (Fluminense Federal University)
Mauricio Pilla (Federal University of Pelotas)
Phillippe Navaux (Federal University of Rio Grande do Sul)
Ricardo Farias (Federal University of Rio de Janeiro)