Aims of the Conference:
ASP-DAC 2015 is the 20th annual international conference on VLSI design automation in Asia and South Pacific regions, one of the most active regions of design and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA). The format of the meeting intends to cultivate and promote an instructive and productive interchange of ideas among EDA researchers/developers and system/circuit/device designers. All scientists, engineers, and students who are interested in theoretical and practical aspects of VLSI design and design automation are welcomed to ASP-DAC.

Areas of Interest:
Original papers in, but not limited to, the following areas are invited.

[1] System-Level Modeling, Simulation and Verification:
- System-level modeling, specification, language, etc.
- Performance analysis of architectures and systems
- System-level simulation and verification
- HW-SW co-simulation/co-verification
- Formal verification
- Transaction-level modeling and validation
- RTL/gate-level modeling and validation
- Logic and symbolic simulation
[2] Interconnect/Device/Circuit/Gate Modeling, Simulation and Verification:
- Clock and bus analysis
- Interconnect and substrate modeling/extraction
- Device modeling and simulation
- Circuit simulation
[3] System-Level Architecture and Design Methodologies:
- SoC and MPSoC design methodology
- HW-SW co-design (partitioning, synthesis and scheduling)
- IP/platform-based design
- Application-specific instruction-set processor (ASIP) system design
- Reconfigurable architectures and systems
[4] Power and Thermal Modeling, Simulation and Optimization/Management:
- Device- and circuit-level power and thermal modeling, simulation and estimation
- Device- and circuit-level power and thermal management
- Cross-layer power and thermal modeling, simulation and estimation
- Cross-layer power and thermal management
- Domain-specific power and thermal management
- Aging-aware design and reliability
[5] On-Chip and System-Level Communication Design, I/O, Networks on Chip, and Memory Systems:
- Communication-based architecture design
- Network-on-chip (NoC) design methodologies
- Interface and I/O design, synthesis and optimization
- System communication architecture
- Architecture and compiler techniques for memory systems
[6] Embedded Systems:
- Embedded software (OS, middleware and compilation)
- Real-time system design
- Advanced storage systems and applications
- Compilation techniques
- Human-computer interface design
- Safety-critical and secure systems
[7] Logic/Behavioral/High-Level Synthesis and Optimization:
- High-level/behavioral/RTL synthesis
- Technology-independent optimization
- Technology mapping
- Interaction between logic design and layout
- Sequential and asynchronous logic synthesis
- Resource scheduling, allocation, synthesis
[8] Physical Design:
- Floorplanning, partitioning and placement
- Buffer insertion and interconnect planning
- Post-place optimization and routing
- Clock network synthesis
- Post-routing optimization and layout verification
- High-level physical design and synthesis
- Package/PCB routing
- Gate sizing and cell library design
[9] Timing and Signal/Power Integrity Analysis and Verification:
- Deterministic timing and performance analysis and optimization
- Statistical timing and performance analysis and optimization
- Power/ground and package modeling, analysis and optimization
- Signal and power integrity
[10] Design for Manufacturability, Yield and Statistical Design:
- DFM, DFY, CAD support for OPC and RET
- Variability analysis, yield analysis and optimization
- Reliability analysis, design for resilience and robustness
- Cell library design
[11] Test and Design for Testability:
- Testable design and fault modeling
- ATPG, BIST and DFT
- Memory test and repair
- Core and system test
- Delay test
- Analog and mixed signal test
[12] Analog, RF and Mixed Signal Design and CAD:
- Analog/RF synthesis
- Analog layout, verification and simulation techniques
- Noise analysis
- High-frequency electromagnetic simulation of circuits
- Mixed-signal design considerations
[13] CAD and Design Methodologies for Emerging Technologies:
- Nanotechnology CAD and design methodologies
- Quantum computing and CAD
- Emerging memory and logic technologies
- 3D integration
- On-chip wireless and optic communication and applications
[14] CAD for Emerging Applications and Cyber-Physical Systems:
- Cyber-physical systems
- Biological, bioelectronics, and biomedical systems
- Automotive applications
- Energy system design and optimization
ACM, IEEE, and IEICE reserve the right to exclude a paper from distribution after the conference (e.g., removal from ACM Digital Library and IEEE Xplore) if the paper is not presented at the conference by the author of the paper. ASP-DAC does not allow double submissions and parallel submissions of similar work to any other conferences and symposia as well as journals and transactions in the field.

Submission of Papers:
Deadline for submission: 5 PM JST (UTC+9) July 11 (Fri), 2014
Notification of acceptance: Sep. 15 (Mon), 2014
Deadline for final version: 5 PM JST (UTC+9) Nov. 10 (Mon), 2014

Specification of the paper submission format will be available at the WEB site:
http://www.aspdac.com/aspdac2015/

Panels, Special Sessions and Tutorials:
Suggestions and proposals are welcome and have to be addressed to the Conference Secretariat
(e-mail: aspdac2015-sec [at] mls.aspdac.com) no later than May 30 (Fri), 2014.

Prospective Sponsors:
ACM SIGDA, IEEE CASS, IEEE CEDA, IEICE ESS, IPSJ SIGSLDM

ASP-DAC2015 Chairs:
General Chair: Kunio Uchiyama (Hitachi, Japan)
Technical Program Chair: Naehyuck Chang (Seoul National University, Korea)
Technical Program Vice Chairs: TingTing Hwang (National Tsing Hua University, Taiwan)
Yasuhiro Takashima (University of Kitakyushu, Japan)

Contact:
Conference Secretariat: aspdac2015-sec [at] mls.aspdac.com
TPC Secretariat: aspdac2015-tpc [at] mls.aspdac.com