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VLSI-SoC 2014 : 22nd IFIP/IEEE International Conference on Very Large Scale IntegrationConference Series : Very Large Scale Integration of System-on-Chip | |||||||||||||||
Link: http://www.vlsi-soc.com | |||||||||||||||
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Call For Papers | |||||||||||||||
22nd IFIP/IEEE International Conference on Very Large Scale Integration
VLSI-SoC 2014 October 6-8, 2014 Playa del Carmen, Mexico Iberostar Tucán and Quetzal Hotel VLSI-SoC 2014 is the 22nd in a series of international conferences sponsored by IFIP TC 10 Working Group 10.5, IEEE CEDA and IEEE CASS, which explores the state-of-the-art in the areas that surround Very Large Scale Integration (VLSI) and System-on-Chip (SoC). Previous conferences have taken place in Edinburgh, Trondheim, Tokyo, Vancouver, Munich, Grenoble, Gramado, Lisbon, Montpellier, Darmstadt, Perth, Nice, Atlanta, Rhodes, Florianópolis, Madrid, Hong Kong, Santa Cruz and Istanbul. The purpose of VLSI-SoC is to provide a forum to exchange ideas and showcase research as well industrial results in EDA, design methodology, test, design, verification, devices, process, systems issues and application domains of VLSI and SoC. Paper Submission: Papers should present original research and industrial results not published or submitted for pub- lication in other forums. Electronic submission in PDF for- mat to the http://www.vlsi-soc.com website is required. The proceedings will be published by IEEE and available through IEEE Xplore. A selection of the conference best papers will be invited to submit an extended version to be included as chapters of a book to be published by Springer. Paper Format: Papers should not exceed 6 pages (single- spaced, 2 columns, 10pt font). Submissions should be in camera-ready, following the IEEE proceedings specifica- tions located at: http://www.ieee.org/web/publications/pubservices/confpub/AuthorTool/conferenceTemplates.html Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the confer- ence. Every accepted paper MUST have at least one au- thor registered at the conference by the time the camera- ready paper is submitted; the author is also expected to attend the conference and present the paper. A limited number of travel grants are available to needy PhD stu- dents. Please see the web site for more information. Topics of interest include but are not limited to: • Analog and Mixed-Signal IC Design • 3-D Integration • Physical Design • SoC Design for Variability, Reliability, Fault Tolerance and Test • New Devices, MEMS, and Microsystems • Digital Signal Processing and Image Processing SoC Design • Prototyping, Validation, Verification, Modelling, and Simulation • Embedded Systems and Processors, Hardware/Software Codesign • Processor Architectures and Multicore SOCs • Logic and High-Level Synthesis • Low-Power and Thermal-aware Design • Reconfigurable SoC Systems for Energy and Reliability • Dependable SoCs • SoC in the Dark Silicon Era • Green Computing Systems • Low Energy Secure Systems • Circuits and Systems for Micro-sensing Applications General Chairs: Arturo Sarmiento Reyes, INAOE, Mexico Ricardo Reis, UFRGS, Brazil Program Chairs: Luc Claesen, Univ. Hasselt, Belgium María Teresa Sanz, INAOE, México Special Sessions Chair: Salvador Mir, TIMA, France Local Arrangement Chair: Gabriela López, INAOE, Mexico Publication Chairs: Lorena García, UNIANDES, Colombia Publicity Chair: Michael Hübner, Ruhr Univ. Bochum, Germany Registration Chair: Roberto Murphy, INAOE, Mexico Finance Chair: Roberto Murphy, INAOE, Mexico PhD Forum Chair: Srinivas Katkoori, USF, USA Reydezel Torres, INAOE, México Steering Committee: Manfred Glesner, TU Darmstadt, Germany Matthew Guthaus, UC Santa Cruz, USA Salvador Mir, TIMA, France Ricardo Reis, UFRGS, Brazil Michel Robert, U. Montpellier, France Luis Miguel Silveira, INESC ID, Portugal Chi-Ying Tsui, HKUST, Hong Kong, China |
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