In the near future we will see "rack-scale computers" with 1000s of cores, terabytes of memory, high-bandwidth and low-latency internal fabrics. These architectures are being driven by the need to increase density and connectivity between servers while lowering cost and power consumption. Enabling technologies such as systems-on-chip (SoCs), glueless fabrics, silicon photonics, and RDMA are already available today as are early prototypes of rack-scale computing architectures from companies such as AMD SeaMicro, HP, and Intel.

These new architectures raise several interesting research questions. Should they be considered as large shared-memory NUMA servers, as traditional distributed systems, or a combination of the two? What are the correct communication primitives to let applications benefit from low-latency remote access? How should the fabric be organized, and how should CPUs, DRAM, and storage be placed in it? What are the likely failure modes and how do we achieve fault tolerance? How should we integrate rack-scale computers into data center networks? How can researchers effectively prototype and test novel ideas in this space?

Answering these questions requires a multidisciplinary effort. The goal of this workshop is to bring together researchers and practitioners from different areas (hardware architectures, networking, operating systems, storage, distributed systems, and HPC) and discuss novel ideas on how to design next-generation rack-scale systems.

We invite submissions on hardware, networking, systems designs, and applications for rack-scale computing. We especially welcome cross-layer approaches such as hardware-software co-design, and encourage unfinished but potentially ground-breaking research ideas.
Paper Submission

Authors are invited to submit original and unpublished work that exposes a new problem, advocates a specific solution, or reports on actual experience. Papers should be submitted using the standard two-column ACM SIG proceedings or SIG alternate template, and are limited to 5 pages including figures and tables, plus as many pages as needed for reference. Papers that exceed this length may be rejected without consideration of their merit. The title, author names, affiliations, and an abstract should appear on the first page.

Final papers will be made available to participants electronically at the meeting, but to facilitate resubmission to more formal venues, no archival proceedings will be published, and papers will not be sent to the ACM Digital Library. Authors will be given the option of having their final paper accessible from the workshop website.

Papers can be uploaded to the online submission site. Once submission is open, the link will be posted here.

If you have any questions, please contact the workshop chairs.
Topics

Submissions can be on any aspect of rack-scale computing, including but not limited to:

Systems-on-chip (SoCs) and Networks-on-chip (NoCs)
Rack-scale fabrics: topologies, routing, congestion control
OS and application design for rack-scale computing
FPGA-based prototyping and design
Memory and storage disaggregation
Coherency, consistency, and fault tolerance
QoS and virtualization
Low-energy and/or high-density design