Great Lakes Symposium on VLSI (GLSVLSI) 2025
June 30 - July 2, 2025, New Orleans, LA, USA
Sponsored by ACM SIGDA

The 35th edition of Great Lakes Symposium on VLSI (GLSVLSI) will be held as an in-person conference. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Please visit http://www.glsvlsi.org/ for more information.

Important Dates:
Paper submission deadline: March 7, 2025 (11:59pm EST)
Acceptance Notification: April 25, 2025
Camera-Ready: May 9, 2025



Program Tracks
VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a- chip, biosensors, CAD tools for biology and biomedical systems, implantable and wearable devices, machine-learning for VLSI design and optimization.

IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems, edge computing, machine learning for IoT, TinyML.
Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), static timing analysis, signal and power integrity, machine learning for CAD and EDA design.
Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-aware design, learning-assisted testing.

Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojans, side-channel analysis, CPS/IoT security, machine learning for HW security.

VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for machine learning, novel architectures for deep learning, brain-inspired computing, big data computing, reinforcement learning, cloud computing for Internet-of-Things (IoT) devices.

Microelectronic System Education Workshop
The Workshop on Microelectronic Systems Education is a one-day in-person only event focusing on pedagogical innovations in all microelectronics-related topics such as materials, processing, device theory, ASIC, FPGA, multicore, GPU, TPU, novel curricula and laboratories, AI/Large Language Models/Machine Learning in electronics education, assessment methods, distance learning, textbooks, and design projects, industry and academic collaborative programs and teaching methods at all levels (K-12, 2-year & 4-year college).



Guidelines
Paper Submission: Authors are invited to submit full-length 6-page, original, unpublished papers along with an abstract of at most 200 words. Submissions exceeding 6 pages are permitted but must not exceed 8 pages in total. Each additional page beyond 6 will incur an extra fee upon acceptance for publication. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the https://easychair.org/conferences/?conf=glsvlsi25 website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format (camera-ready): Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class.

For Overleaf users, please find the following template: ACM Proceedings Template - Overleaf. For LaTeX users, please find the following ZIP file: acmart-primary.zip. For Word users, please find the following template: interim-layout.docx.

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

By submitting your article to an ACM Publication, you are hereby acknowledging that you and your co-authors are subject to all ACM Publications Policies, including ACM's new Publications Policy on Research Involving Human Participants and Subjects. Alleged violations of this policy or any ACM Publications Policy will be investigated by ACM and may result in a full retraction of your paper, in addition to other potential penalties, as per ACM Publications Policy.

Please ensure that you and your co-authors obtain an ORCID ID, so you can complete the publishing process for your accepted paper. ACM has been involved in ORCID from the start and we have recently made a commitment to collect ORCID IDs from all of our published authors. The collection process has started and will roll out as a requirement throughout 2022. We are committed to improve author discoverability, ensure proper attribution and contribute to ongoing community efforts around name normalization; your ORCID ID will help in these efforts.