Third Workshop on Computer Architecture and Operating Systems co-design (CAOS)

(http://caos.csail.mit.edu)

In conjunction with:
the 7th ACM International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC'12)
Paris, France, January 23-25, 2012


Multicores are monopolizing the market, from embedded systems to supercomputers.
However, extracting high performance from these modern systems has become a complex
task. As the number of cores per chip and/or the number of hardware threads per
core continue to increase, new research questions arise in scheduling, power,
temperature, dependability, scalability, design complexity, efficiency, throughput,
heterogeneity, languages, compilers etc. Performance is not the only important
metric anymore, and new metrics (such as security, power, total throughput,
reliability and Quality of Service) are becoming more important than ever.
Therefore, it is evident that neither hardware nor software alone can achieve
the desired performance and, at the same time, be compliant with these constraints.
One approach to tackle these new challenges comes from hardware-software co-design.

This workshop aims to bring together researchers and engineers from academia and
industry to share ideas and research directions in Computer Architecture and
Operating System co-design and interaction. Authors are invited to submit
innovative manuscripts in all areas of parallel architecture, distributed
processing, real-time systems, HPC systems and commercial/server systems.

Topics of interest

Papers are sought on topics including, but not limited to:

* Architectural and OS support for scheduling applications on emerging
multicore systems
* Architectural and OS support for programming languages and compilers
* Architectural and OS support for power and thermal management
* Architectural and OS support for specialized architectures (e.g.,
heterogeneous processors, accelerators, GPGPUs etc.)
* Architectural and OS support for reliability, dependability, and security
* Benchmarking and characterization of OS activity in multicore architectures
* Architectural and OS support for virtualization
* Architectural and OS support to manage processor resource allocation and
heterogeneity for Quality of Service
* Simulation tools for full system simulation

The workshop provides a forum to discuss the latest proposals in co-designing the
computer architecture, software systems and OS and to bring ideas and research
problems to the attention of the audience. Papers reporting on on-going work that
address cross-cutting issues and provide thought-provoking insights into the main
themes are encouraged. Position and vision papers are also welcomed.

Workshop proceedings will be made available at the workshop.

Selected 1 or 2 best papers will be considered for publication in IEEE Computer
Architecture Letters (CAL).



Important dates

Abstracts submission deadline: -- tentative -- Oct. 7th 2011
Papers submission deadline: -- tentative -- Oct. 14th 2011
Notification to authors: -- tentative -- Nov. 21st 2011
Camera Ready Deadline: TBA
HiPEAC Conference: Jan 23-25th, 2012
Workshop: TBA

Paper submission

Papers submitted to CAOS 2012 must use the two-column, 10-pt font, IEEE conference
proceedings format. Manuscript preparation guidelines can be found at the IEEE
web site. Submission should be a maximum of eight (8) pages, excluding references
and appendices.


Program Committee Chairs:
Roberto Gioiosa Barcelona Supercomputing Center, Spain roberto.gioiosa[_at_]bsc.es
Omer Khan MIT, USA okhan[_at_]csail.mit.edu

Program Committee:

Buyuktosunoglu, Alper (IBM T.J. Watson, USA)
Cesati, Marco (University of Rome Tor Vergata, Italy)
Davis, Kei (LANL, USA)
Etsion, Yoav (Barcelona Supercomputing Center, Spain)
Falcon, Ayose (Intel Barcelona Research Center, Spain)
Hempstead, Mark (Drexel University, USA)
Holt, Jim (Freescale, USA)
Koushanfar, Farinaz (Rice University, USA)
Kursun, Eren (IBM Research, USA)
Lang, Michael (LANL, USA)
Miller, Jason (MIT, USA)
Nikolopoulos, Dimitrios (University of Crete, Greece)
Schirner, Gunar (Northeastern University, USA)
Tumeo, Antonino (PNNL, USA)
Wisniewski, Robert (IBM Research, USA)