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GLSVLSI 2026 : Great Lakes Symposium on VLSI

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Link: https://www.glsvlsi.org
 
When Jun 22, 2026 - Jun 24, 2026
Where Finger Lakes, NY, USA
Submission Deadline Mar 2, 2026
Notification Due Apr 30, 2026
Final Version Due May 15, 2026
 

Call For Papers

The 36th edition of Great Lakes Symposium on VLSI (GLSVLSI) will be held in the beautiful Finger Lakes region in New York. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited.

Full call details: https://www.glsvlsi.org

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Program Tracks

* VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal circuits, NoC, SoC, IO & interconnects, memories, lab-on-a-chip, biomedical sensors and devices, circuits for wearable or robotic devices, VLSI design and optimization.

* VLSI for Artificial Intelligence (AI): hardware AI accelerators, novel circuit and architectures for machine learning & AI, brain-inspired and neuromorphic computing hardware, compute-in-memory design.

* IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems; machine learning for IoT; robots; wearable device and system; network & communication system.

* Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), timing analysis, signal and power integrity, machine learning and AI for CAD and EDA.

* Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-resilient design, learning-assisted testing.

* Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, post CMOS VLSI.

* Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, side-channel attack/defense, CPS/IoT security, AI for HW security, hardware for classical and post-quantum cryptography.

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Microelectronic System Education Workshop

A one-day co-located workshop will cover the following topics: pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, industry and academic collaborative programs and teaching.

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Important Dates:

* Paper submission deadline: March 2nd, 2026 (11:59 pm EST)
* Acceptance Notification: April 30, 2026
* Camera-Ready: May 15, 2026

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Guidelines

* Paper Submission: Authors are invited to submit full-length 6-page, original, unpublished papers along with an abstract of at most 200 words. Submissions exceeding 6 pages are permitted but must not exceed 8 pages in total. Each additional page beyond 6 will incur an extra fee upon acceptance for publication. Reference is counted toward the page limit. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the https://easychair.org/conferences/?conf=glsvlsi26 website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

* Paper Format: Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: ACM Template and the classification system detailed at: ACM 2012 Class. For Overleaf users, please find the following template: Proceedings Template - Overleaf. For LaTeX users, please find the following ZIP file: acmart-primary.zip. For Word users, please find the following template: interim-layout.docx.

* Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

* ACM Open Access and APCs: As from January 1, 2026, all ACM Publications will be published on a fully Open Access basis and will require participation in ACM Open, the payment of an APC, or a geographic or discretionary waiver to publish with ACM. Authors from institutions not participating in ACM Open will need to pay an APC to publish their papers, unless they qualify for a financial waiver.

Full call details: https://www.glsvlsi.org

Related Resources

DFTS 2026   International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems