Scope

* RF, analog and mixed-signal circuits
* Sensors and interface circuits
* Digital circuits and ASIC
* CPU, DSP and multicore architectures
* Memory circuits and systems
* Low power logic and architectures
* Multimedia processing circuits
* Communication circuits
* Embedded systems and software
* Designs using novel technologies
* System-in-package design
* Electronic System Level Design
* Modeling and simulation
* Hardware-software co-design
* Logic and architecture synthesis
* Physical design and verification
* Design for manufacturability
* Power estimation and optimization
* Design verification
* Test generation and fault simulation
* BIST and design for testability
* RF, analog and mixed-signal test
* SOC and system level testing
* System level design automation

Submission
Authors should submit their 4-page Full Papers electronically through the conference website at http://vlsidat.itri.org.tw
At least one author of each paper MUST register for the Conference for papers to be included in the proceedings.
Accepted papers must be presented by one of the authors at the Conference. Presentation must be in English and will be limited to 20 minutes with additional 5 minutes for discussion. Authors should submit their papers (accepted papers only) in IEEE compatible version after receiving the notification of acceptance. Accepted papers will be published in the Proceedings as submitted without revisions.

Important Dates
Paper Submission Online July, 2008
Paper Submission Deadlines Oct. 19, 2008
Notification of Acceptance Dec. 25, 2008
Final Paper (IEEE compatible version) Submission Deadline Jan. 31, 2009
Author Registration Deadline Feb. 28, 2009