System-on-Chip (SoC) and System-in-Package (SiP) devices, comprising digital, analog, optical, RF, and Micro-Electro-Mechanical Systems (MEMS) are foundations of ubiquitous embedded high-performance computing (HPC). Such systems will provide solutions in communication, entertainment, medical and smart mobility technologies underpinning emerging “Digital Societies”. Recent advances in systems, packaging and process technologies are enabling the computation of hundreds of teraflops per chip and chiplet system integration unleashing the massive rise of AI-based edge devices, various accelerators, new products and applications. This enormous demand for computing per silicon-based SoC and SiP integration creates new challenges with respect to storage, memory, security, reliability, power, on- and off-chip communication, packaging including reliable design and verification.

For over 35 years the IEEE International System-on-Chip Conference (SOCC) has been a premier forum for
sharing latest advancements in SoC architectures, systems, logic and circuit design, process technology, test, design tools, and application scenarios. We consequently continue this tradition with the 2023 conference at the heart of Silicon Valley in Santa Clara, CA.

Submission of Papers and Special Session Proposals
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Regular Papers
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Limited to six double-column IEEE formatted pages. All submissions will receive double-blind peer
review. Accepted papers presented at the conference will be included in the SOCC proceedings and
be submitted for inclusion into IEEE Xplore® subject to meeting IEEE Xplore’s quality requirements.

Industrial Talks
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One up to two pages paper containing problem statement, importance, prior work, technical
solution, and benefits, in double-column IEEE format, to be published in the SOCC proceedings.

Special Session Proposals
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Must include title, topic rationale, organizer’s short bio, and a list of contributed papers. Submit
directly to specialsessions@ieee-socc.org.