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VLSIE 2026 : 7th International Conference on VLSI & Embedded Systems

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Link: https://cst2026.org/vlsie/index
 
When Aug 15, 2026 - Aug 16, 2026
Where Melbourne, Australia
Submission Deadline Jun 20, 2026
Notification Due Jul 25, 2026
Final Version Due Aug 1, 2026
Categories    VLSI   embedded systems   communications   sensor networks
 

Call For Papers

7th International Conference on VLSI & Embedded Systems (VLSIE 2026)

August 15 ~ 16, 2026, Melbourne, Australia

Scope & Topics

The 7th International Conference on VLSI & Embedded Systems (VLSIE 2026) serves as a premier international forum for researchers, industry practitioners, and academic experts to share cutting edge advances in VLSI design, semiconductor technologies, embedded architectures, and intelligent systems. As the semiconductor landscape rapidly evolves with breakthroughs in chiplet based integration, AI driven design automation, advanced packaging, and next generation embedded intelligence, VLSIE 2026 aims to bring together diverse perspectives that drive innovation across theory, methodologies, tools, and real world applications.

The conference invites original, unpublished research contributions that present significant advances in VLSI circuits, systems, CAD/EDA methodologies, embedded computing, hardware security, emerging nano devices, and domain specific architectures. Both theoretical developments and experimental results are welcome, along with survey papers, industrial case studies, and application driven research that highlight impactful progress in the field.

Authors are encouraged to submit high quality articles that illustrate novel research results, innovative system designs, practical implementations, and forward looking insights across the broad spectrum of VLSI and embedded systems. Submissions may address, but are not limited to, the topics listed below.

Topics of interest include, but are not limited to, the following

    VLSI Circuits, Design and Systems
  • Digital, Analog, Mixed Signal and RF IC Design
  • High Performance, Low Power and Ultra Low Power Circuits
  • Clocking, Synchronization and Timing Optimization
  • Memory Circuits: SRAM, DRAM, NVM, MRAM, ReRAM, PCM
  • High Speed I/O, SerDes and On Chip Interconnects
  • 3D ICs, 2.5D Integration and Advanced Packaging
  • Chiplet Based SoCs and UCIe/BoW/AIB Interconnect Standards
  • Gate All Around (GAA) Transistors and 2nm Process Technologies
  • Co Packaged Optics (CPO), Silicon Photonics and Glass Substrates
  • HBM4/HBM Next and High Bandwidth Flash (HBF) Memory
    Computer Aided Design (CAD) and Electronic Design Automation (EDA)
  • AI Driven EDA and ML Based Optimization (highlighted at VLSID 2026)
  • Logic Synthesis, Physical Design and PandR Automation
  • Formal Verification, Equivalence Checking and Model Checking
  • Power, Thermal and Reliability Aware CAD
  • CAD for 3D ICs, Chiplets and Heterogeneous Systems
  • Security Aware CAD and Trojan Detection
  • Simulation, Emulation and Virtual Prototyping
  • Design Space Exploration and Automated Architecture Search
  • Digital Twins for Semiconductor Design and Manufacturing
    Low Power, Energy Efficient and Sustainable VLSI
  • Near Threshold and Sub Threshold Computing
  • Energy Harvesting and Battery less Systems
  • Thermal Management and Cooling Technologies
  • Green Computing and Sustainable Semiconductor Design
    Emerging Technologies and Post CMOS Devices
  • Spintronics, Photonics, MEMS/NEMS, 2D Materials
  • Wafer Scale Computing Architectures
  • Quantum Devices, Cryogenic CMOS and Quantum Classical Interfaces
  • Neuromorphic Computing and Brain Inspired Hardware
  • In Memory Computing (IMC) and Compute In Memory (CIM)
  • Nano/Molecular Electronics
    Hardware Security, Trust and Supply Chain Integrity
  • Side Channel and Fault Injection Attack Resilience
  • Hardware Trojans: Detection and Prevention
  • Secure Boot, Firmware Integrity and Trusted Execution
  • Secure Semiconductor Supply Chain and Anti-Counterfeiting
  • PUFs, Secure Key Storage and Cryptographic Hardware
  • Microarchitecture and Processor Design
  • RISC V Architectures, Vector Extensions and Domain Specific RISC V
  • Application Specific Processors (ASIPs)
  • GPU, TPU and AI Accelerator Architectures
  • Memory Hierarchy, Caches and Interconnects
  • High Performance and Low Power Microarchitectures
    AI/ML Hardware and Accelerators
  • AI Accelerators for DNNs, CNNs, Transformers and LLMs
  • Hardware for LLM Training (not just inference)
  • Edge AI SoCs and Ultra Low Power AI Hardware
  • Processing in Memory (PIM) and Near Memory Computing
  • FPGA Based AI Acceleration
  • ML Driven Hardware Optimization
    Embedded Systems, IoT and Cyber Physical Systems
  • Embedded System Architecture and HW/SW Co Design
  • Real Time and Safety Critical Systems
  • Real Time AI and Safety Certified ML Hardware (ISO 26262, DO 254)
  • Embedded Software, Compilers and Toolchains
  • Edge AI and TinyML Systems
  • IoT Hardware Platforms, Sensors and Actuators
  • Networked Embedded Systems and CPS
  • Autonomous Systems, Robotics and Automotive Electronics
    Testing, Verification, Reliability and Fault Tolerance
  • DFT, BIST and Post Silicon Validation
  • Fault Modeling, Diagnosis and Recovery
  • Reliability Under Variability, Aging and Soft Errors
  • Test for 3D ICs, Chiplets and Heterogeneous Systems
  • Safety Critical Verification (Automotive, Aerospace, Medical)
    Biomedical Circuits and Healthcare Electronics
  • Wearable and Implantable Medical Devices
  • Bio Signal Processing Hardware
  • Neural Interfaces and Bio Integrated Electronics
  • AI Driven Healthcare Hardware
    VLSI Applications and System Level Integration
  • 5G/6G, THz Wireless and Communication Hardware
  • Imaging, Video and Multimedia Processing Hardware
  • Sensor Networks and Smart Devices
  • Industrial, Automotive and Aerospace Electronics
  • Security, Cryptography and Blockchain Hardware

Paper Submission

Authors are invited to submit papers through the conference Submission System by June 20, 2026. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this conference. The proceedings of the conference will be published by The proceedings of the conference will be published by Computer Science Conference Proceedings in Computer Science & Information Technology (CS & IT) series (Confirmed).

Selected papers from VLSIE 2026, after further revisions, will be published in the special issue of the following journals.

Important Dates

Submission Deadline: June 20, 2026
Authors Notification: July 25, 2026
Final Manuscript Due: August 01, 2026

Co - Located Event

***** The invited talk proposals can be submitted to vlsie@cst2026.org



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