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ACM JETC Emerging NoCs 2017 : ACM JETC Special Issue on Emerging Networks-on-Chip: Designs, Technologies, and Applications | |||||||||||||||
Link: http://jetc.acm.org/CFP-EMERGINGNOCS.pdf | |||||||||||||||
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Call For Papers | |||||||||||||||
Scope:
For decades, Moore’s Law coupled with Dennard scaling has resulted in increasing transistor integration capacity with a constant power density. However, with the end of Dennard scaling, power efficiency in multicore designs has become a concern. Studies have shown that global metallic interconnects will consume significant amounts of power to achieve the communication bandwidth that will be required by future Chip Multi-Processors (CMPs). An energy-efficient inter- and intra-chip communication infrastructure is the key to guarantee the continuous growth of CMPs. Compared to the traditional planar metallic interconnects, emerging technologies such as silicon photonics and wireless can offer unprecedented advantages to the future generations of CMPs. Nevertheless, many challenges should be addressed to exploit the full potential of such alternative interconnect technologies, at any abstraction level, from the very bottom level of device manufacturing to the architecture and system level. The ACM Journal on Emerging Technologies in Computing Systems (JETC) seeks original manuscripts for a special issue on “Emerging Networks-on-Chip: Designs, Technologies, and Applications”, scheduled for publication in July 2018. The purpose of this special issue is to solicit papers discussing the latest advancements in the design and technology of emerging networks-on-chip and evaluate their future prospects. Contributions that include real case studies and applications are especially welcome. ==================================== Topics: • Emerging networks-on-chip interconnects (silicon photonics, wireless, carbon-based, quantum, superconducting, etc.) • 3D integration and packaging • Power- and thermal-aware design of emerging networks-on-chip • Fault-tolerance and reliability of emerging networks-on-chip • Application-specific design of emerging networks-on-chip ==================================== Submission procedure: Interested authors should submit their papers to https://mc.manuscriptcentral.com/jetc. The author guideline can be found at http://jetc.acm.org/authors.cfm. For further information, please contact Edoardo Fusella (edoardo.fusella@unina.it) or Mahdi Nikdast (mahdi.nikdast@mcgill.ca). ==================================== Important Dates: Submission deadline: 30th September, 2017 Reviews completed: 31st December, 2017 Article revisions due: 28th February, 2018 Notice of final acceptance: 31st March, 2018 All materials due to edit: 15th April, 2018 Tentative Publication Date: July 2018 ==================================== Guest editors: Edoardo Fusella, University of Naples Federico II Mahdi Nikdast, Polytechnique Montréal Ian O’Connor, Ecole Centrale de Lyon José Flich, Universitat Politècnica de València Sudeep Pasricha, Colorado State University |
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